VLSI-VERIFICATION PLANNING-Vlsi Lead

Wipro (Kochi, 日本) 14日前

  • Good understanding of PCIe/USB/SATA/PMC/Power/ICC protocol and debugs
  • Good knowledge on Verification concepts i.e. SV/UVS
  • Knowledge on Test scenarios and development from scratch
  • Experience in developing verification environment using UVM.
  • Debug knowledge   RTL using simulators like Synopsys VCS.
  • Knowledge at SOC level debug simulation failures.
  • Good communication skills to lead the team of 3 to 4 team members.

VLSI-VERIFICATION PLANNING-Vlsi Lead

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