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Responsibilities: This requisition is for an entry-level High-Speed Interface (SerDes) Engineer to strengthen our in-house capability for high-speed PHY/IP development. The candidate will contribute to ongoing product programs and next-generation feasibility studies by executing simulation, verification,
Senior High-speed analog integrated circuit design engineer (Japan) What you will do We are looking for a motivated and dynamic senior analog IC designer, who will focus on the analog EIC design for high-speed optical transceivers.
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