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• Define System Architecture of array readout circuit based on product features and performance requirements. • Work closely with digital, layout, process, evaluation engineers to debug, optimize performance of image sensors and successfully bring new products from
Responsibilities: This requisition is for an entry-level High-Speed Interface (SerDes) Engineer to strengthen our in-house capability for high-speed PHY/IP development. The candidate will contribute to ongoing product programs and next-generation feasibility studies by executing simulation, verification,
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