Introduction Edgecortix Inc. is seeking a Hardware Design Engineer with proven RTL/logic and ASIC design expertise. If you have a strong desire to build state-of-the-art digital chips and systems join us and lets reshape the future
Design Verification Engineer About Edgecortix At Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from multiple years of research, our unique AI hardware
A IP/SS Pre-Sil Verification Lead is a crucial role in semiconductor companies focusing on the verification of Intellectual Property (IP) blocks and Sub-Systems (SS) before silicon fabrication. The job description for this role typically includes the
A Micro Architect is a key role in semiconductor companies and computer architecture firms, responsible for designing the microarchitecture of computer processors and systems-on-chip (SoCs). The job description for this role typically includes the following responsibilities
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A RTL Design Engineer with 9-15 years of experience is a senior-level position in semiconductor companies responsible for designing and implementing Register Transfer Level (RTL) logic for complex digital integrated circuits. The job description for this
A SoC Pre-Sil Verification Engineer with 15+ years of experience is a senior-level position in semiconductor companies, responsible for leading and executing pre-silicon verification activities for complex System-on-Chip (SoC) designs. The job description for this role
A SoC Pre-Sil Verification Engineer with 2-3 years of experience typically plays a key role in semiconductor companies, focusing on the pre-silicon verification of System-on-Chip (SoC) designs. The job description for this role includes the following
A SoC Pre-Sil Verification Engineer with 4-8 years of experience is a specialized role within semiconductor companies responsible for verifying System-on-Chip (SoC) designs before silicon fabrication. The job description for this role typically includes the following
A SoC Pre-Sil Verification Engineer with 9 to 15 years of experience is a senior-level position in semiconductor companies involved in the pre-silicon verification of System-on-Chip (SoC) designs. The job description for this role typically includes
A SoC Pre-Sil Verification Manager is a key role in semiconductor companies involved in designing and manufacturing System-on-Chip (SoC) products. The job description for this role typically includes the following responsibilities and qualifications: Responsibilities: Verification Strategy:
【職種】設計(電子・機械・設備・建築) ＜大手半導体関連企業でのお仕事です＞ 車載の論理設計検証を担当していただきます。 【製品】 半導体/電子部品 【担当回路】 デジタル回路、ASIC回路、論理設計、論理合成 【詳細】 論理設計検証、lintチェック、仮合成、DFT挿入、パターン解析、画像処理 【工程】 構想/仕様検討、詳細設計 【ツール】 ModelSim、SystemVerilog、Verilog、ARM、Amber、Python、MATLAB 国分寺駅よりバス5分（国分寺市／最寄り駅：国分寺駅、西国分寺駅） 08:45〜17:30(実働時間07時間45分) 月間想定残業時間：10〜30時間程度 【派遣先について】 電機・電子・OA・精密機器メ−カ− 業種：メーカー関連 【派遣会社】パーソルクロステクノロジー株式会社 ◆社会保険（健康保険、介護保険、厚生年金保険、労働者災害補償保険、雇用保険） ◆通勤交通費・在宅勤務手当 ◆休暇休業（入社日より有給休暇付与、慶弔・介護休暇、ご病気・災害時などの各種見舞金） ◆健康管理（定期健康診断、ストレステスト、予防接種助成） ◆出産・育児支援（母性保護制度の導入、時短制度） ◆各種支援制度・優待制度・研修・講座 など...
【職種】設計(電子・機械・設備・建築) ＜大手LSI設計企業でのご就業です＞ ASICのデジタル論理設計/検証をお任せします。 【工程】 詳細設計、論理設計/検証、lintチェック、仮合成、不具合原因究明/改善検討、評価 【回路種類】 デジタル回路、ASIC回路 【環境】 Python、MATLAB、SystemVerilog、Verilog、CPU(ARM)、I/F(Amber)、ModelSim 国分寺駅より車7分（小平市／最寄り駅：国分寺駅） 09:00〜18:00(実働時間08時間) 月間想定残業時間：20〜30時間程度 【派遣先について】 電機・電子・OA・精密機器メ−カ− 業種：メーカー関連 【派遣会社】パーソルクロステクノロジー株式会社 ◆社会保険（健康保険、介護保険、厚生年金保険、労働者災害補償保険、雇用保険） ◆通勤交通費・在宅勤務手当 ◆休暇休業（入社日より有給休暇付与、慶弔・介護休暇、ご病気・災害時などの各種見舞金） ◆健康管理（定期健康診断、ストレステスト、予防接種助成） ◆出産・育児支援（母性保護制度の導入、時短制度） ◆各種支援制度・優待制度・研修・講座 など...
