Description The OIST Core Facilities play a vital role in facilitating research and education by offering state-of-the-art research facilities and support services to OIST researchers and students. The Engineering Section, one of our eight technical sections,
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety
Job Description Lead the development of CPU Subsystems (CPUSS), a core component of next-generation microcontrollers. Drive the architecture definition, specification development, design, and verification of CPU subsystem components, including CPU cores, caches, memory protection mechanisms, debug
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety
Job Summary The Process Assurance Engineer (Electrical) is a vital role responsible for guaranteeing that all electrical and avionic components, systems, and manufacturing processes meet the highest standards of quality, safety, and regulatory compliance. This role
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring
Job Description ・Technical Domain CMOS Analog IP Design (Temp sensor, BGR, AMP, Comparator. etc) ・Target Products SoC and MCU products ・Project Overview Contribute to product differentiation through the development of temperature sensors and other analog IPs.
Job Description Develop System Control Subsystems (SYSSS) for microcontrollers (MCUs) and SoCs. Develop system control functions that govern overall chip operation, including reset, clock management, and low-power modes. Design and enhance system architectures to support new
Challenge Yourself and Impact the Future! MacDermid Alpha Electronics Solutions, a business segment of Element Solutions Inc (NYSE: ESI), is renowned worldwide for its commitment to revolutionizing the electronics industry. With a legacy spanning over a century, we
企業概要 The Wabtec Mining team delivers world class drive systems for heavy haul mining trucks ranging up to 400T with a developing focus on sustainability technology introduction. In this role, the Senior Systems Engineer will lead
Job Description Our goal is to make everyday life and industry smarter and more prosperous by advancing lithium-ion battery control ICs. The applications for our technology continue to expand across PCs, mobile devices, industrial equipment, and
About the job Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam DAngelo, Larry Summers, and Jack Dorsey. Position: Radio
Job Description • Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM • Target Products MCUs for automotive, industrial, and IoT applications • Project Overview Layout design for NVM IP based
求人内容 ・担当技術分野 不揮発メモリIP(Flash、MRAM、ReRAM等）のレイアウト設計 ・対象製品 車載／産業／IoT向けMCU ・プロジェクト内容 自社Fab／Foundryのメモリセルをベースとした不揮発メモリIPのレイアウト設計 MCU製品のPPA（Performance/Power/Area)最適化に貢献 国内外のメモリ開発チームと協力するグローバルな開発環境 ・担当業務 メモリレイアウト設計チームの技術リーダー IP要求仕様／回路仕様からレイアウト戦略を立案 レイアウト設計／検証実務を主導 ルネサスは車載／産業／IoT向けMCUのさらなる競争力強化に向けて、次世代混載不揮発メモリ技術およびIP開発への投資を拡大しています。混載不揮発メモリIP(FlashやEmerging memory (MRAM, ReRAMなど)ベース)はMCUの競争力に直結するため、高性能化／大容量化／高信頼化への要求はますます高まっています。 本ポジションでは、将来のMCUに搭載される混載不揮発メモリIPのレイアウト設計を担当いただきます。数千万台から数億台規模で出荷される世界トップクラスのMCU事業を支える中核技術の開発に携わることができるため、大きな事業インパクトを実感できるポジションです。また、ルネサスの混載不揮発メモリIP開発部門は、ISSCC、Symposium on VLSI Circuits、IEDMなどの世界最高峰の半導体学会へ積極的・継続的に論文投稿／発表を行っており、高い技術スキルを持った開発メンバとともに専門性をさらに磨きつつ、より広範なメモリ技術スキルを経験・獲得できる環境です。資格 【MUST】 ・不揮発メモリの手書きレイアウト設計の経験（目安：10年以上） ・回路設計者との合意形成、レイアウト設計レビューのリーディング経験（目安：5年以上） ・海外パートナーと英語を使用した協業経験 【WANT】 ・P&R設計の経験 ・アナログ回路設計の経験 ・AIを活用したレイアウト設計の経験その他の情報 ルネサスは、「To Make Our Lives Easier（人々の暮らしをより豊かで快適にする）」というPurposeのもと、組込み半導体ソリューションを提供するグローバル企業です。世界30か国以上で活躍する21,000人を超えるエンジニアや課題解決のプロフェッショナルとともに、自動車、産業、インフラ、IoT分野における世界最先端のテクノロジー開発に携わり、より安全で、健康的で、環境にやさしく、スマートな未来の実現に貢献しています。 ルネサスでは、「TAGIE（Transparent、Agile、Global、Innovative、Entrepreneurial）」を企業文化の中核としています。TAGIEは、私たちの働き方や成長のあり方、そしてPurposeの実現に向けた取り組みを支える共通の価値観です。この協調的な精神と挑戦するマインドセットが、半導体技術を通じた産業の変革と、世界中の人々の暮らしへの貢献を可能にしています。
Job Description • Lead semiconductor package design in collaboration with IC design engineers to optimize product cost and performance. • Lead the layout design of package substrates and printed circuit boards for reference designs for semiconductor products
企業概要 The Wabtec Mining team delivers world class drive systems for heavy haul mining trucks ranging up to 400T with a developing focus on sustainability technology introduction. In this role, the Senior Systems Engineer will lead
Job Description 【Background】 Drive technical excellence in the analog design of Power Management ICs by delivering hands-on block- and top-level design solutions from specification through design completion, in close collaboration with block lead designers. 【Core Responsibilities】