A Full Chip PnR (Place and Route) Lead is a senior-level position in semiconductor companies responsible for leading the physical design implementation process, including place and route, for entire chip designs. The job description for this
A RTL Design Engineer with 9-15 years of experience is a senior-level position in semiconductor companies responsible for designing and implementing Register Transfer Level (RTL) logic for complex digital integrated circuits. The job description for this
A SoC Pre-Sil Verification Manager is a key role in semiconductor companies involved in designing and manufacturing System-on-Chip (SoC) products. The job description for this role typically includes the following responsibilities and qualifications: Responsibilities: Verification Strategy: Develop
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
