Job Description Develop System Control Subsystems (SYSSS) for microcontrollers (MCUs) and SoCs. Develop system control functions that govern overall chip operation, including reset, clock management, and low-power modes. Design and enhance system architectures to support new
Job Description Lead the development of CPU Subsystems (CPUSS), a core component of next-generation microcontrollers. Drive the architecture definition, specification development, design, and verification of CPU subsystem components, including CPU cores, caches, memory protection mechanisms, debug and trace
Job Description You will play a key role in strengthening the security of Renesas Embedded Processing (EP) products, including MCUs, MPUs, wireless connectivity devices, AI accelerators, and system solutions. As a member of the EP Core
Job Description ・Technical Domain CMOS Analog IP Design (Temp sensor, BGR, AMP, Comparator. etc) ・Target Products SoC and MCU products ・Project Overview Contribute to product differentiation through the development of temperature sensors and other analog IPs. Participate
Job Description 【Reason for Hiring】 We are looking for an experienced SoC Architecture Engineer for high performance SOCs & MCUs, to support the Technical Project Leaders/Chip leads and SOC Architecture organization working closely with business, product marketing,
Job Description Job Summary This role is responsible for planning and driving global engineering talent development strategies, including initiatives related to engineers capability development, skills management, career development, and technical leadership development. The role will partner closely with business units, engineering
Job Description We are seeking an experienced Semiconductor Test Engineer to join our engineering team in Kodaira, Tokyo, Japan. This is a hands-on technical role with the opportunity to develop and deploy production test solutions for advanced
Job Description We are looking for an experienced validation engineer to join our team. The role focuses on technical leading of UX audit/validation for our MCU, MPU and Power product. This is a great opportunity to work
Job Description • Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM • Target Products MCUs for automotive, industrial, and IoT applications • Project Overview Layout design for NVM IP based
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety
Job Description 【Background】 Edge AI is one of Renesas’s key secular growth areas.Within this domain, Reality AI delivers advanced AI for sensing applications and is a critical solution that will also support the newly evolving Renesas365
Job Description Job Description You will develop technologies and systems to fundamentally improve the efficiency of test development and characterization processes for automotive MCU/SoC products. Your role spans both technical workflow design and system automation, enabling scalable,
Job Description As an AI Compiler Engineer on the Renesas HPC team, you will be responsible for driving compiler and code generation technologies that unlock the full compute potential of Renesas next-generation automotive System-on-Chip platforms, including advanced
Job Description Principal Accountabilities: Execute and own assigned design verification activities that support first-pass silicon success and confirm compliance with performance, power, and schedule requirements. Own or contribute to analog and mixed-signal verification of integrated circuits
Job Description 【Role Summary】 We are seeking Principal Analog Engineer to serve as a global technical authority who drives quality, technical execution, and engineering capability across complex integrated circuit development. This role spans the full lifecycle from specification
Job Description 当社は2035年までに収益200億ドル超の達成を目標に掲げ、先端半導体ソリューションの可能性をさらに広げてまいります。技術革新が加速する今こそ、その最前線で共に挑戦できる環境をご用意しております。 この挑戦を共に牽引していただけるエンジニアを探しております。我々のチームでは、互いの専門性を尊重し高め合いながら成長できる風土を大切にしております。これまでの経験とスキルを活かし、共に新たな価値を創造していただける方をお待ちしております。 (English) Our company aims to surpass $20 billion in revenue by 2035, further expanding the potential of advanced semiconductor solutions. As technological innovation accelerates, we offer an environment where you can take
Job Description Position Overview The Layout Tape-Out Support Engineer is responsible for end-to-end tape-out execution for Gallium Nitride (GaN) technologies. This role supports multiple concurrent tape-out flows, ensuring accurate, high-quality mask data delivery while enabling effective collaboration across
Job Description • Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM • Target Products MCUs for automotive, industrial, and IoT applications • Project Overview Layout design for NVM IP based