Job Description • Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM • Target Products MCUs for automotive, industrial, and IoT applications • Project Overview Layout design for NVM IP based
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety teams
Job Description Responsibilities Single point of contact on functional safety for lead customers and their certification bodies; present and defend the safety concept, safety manual and FMEDA. Derive the IC-level safety requirements with customer system safety teams
Job Description ・Technical Domain CMOS Analog IP Design (Temp sensor, BGR, AMP, Comparator. etc) ・Target Products SoC and MCU products ・Project Overview Contribute to product differentiation through the development of temperature sensors and other analog IPs.
Job Description 【Reason for Hiring】 We are looking for an experienced SoC Architecture Engineer for high performance SOCs & MCUs, to support the Technical Project Leaders/Chip leads and SOC Architecture organization working closely with business, product
Job Description Develop System Control Subsystems (SYSSS) for microcontrollers (MCUs) and SoCs. Develop system control functions that govern overall chip operation, including reset, clock management, and low-power modes. Design and enhance system architectures to support new
Job Description Principal Accountabilities: Execute and own assigned design verification activities that support first-pass silicon success and confirm compliance with performance, power, and schedule requirements. Own or contribute to analog and mixed-signal verification of integrated circuits or
Job Description 【Role Summary】 We are seeking Principal Analog Engineer to serve as a global technical authority who drives quality, technical execution, and engineering capability across complex integrated circuit development. This role spans the full lifecycle
Job Description Job Description You will develop technologies and systems to fundamentally improve the efficiency of test development and characterization processes for automotive MCU/SoC products. Your role spans both technical workflow design and system automation, enabling
Job Description Position Overview The Layout Tape-Out Support Engineer is responsible for end-to-end tape-out execution for Gallium Nitride (GaN) technologies. This role supports multiple concurrent tape-out flows, ensuring accurate, high-quality mask data delivery while enabling effective collaboration
Job Description • Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM • Target Products MCUs for automotive, industrial, and IoT applications • Project Overview Layout design for NVM IP based