At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
At EY, you’ll have the chance to build a career as unique as you are, with the global scale, support, inclusive culture and technology to become the best version of you. And we’re counting on your
A Full Chip LVS Lead is a key role in semiconductor companies responsible for leading Layout vs. Schematic (LVS) verification activities for entire chip designs. The job description for this role typically includes the following responsibilities
A Full Chip PnR (Place and Route) Lead is a senior-level position in semiconductor companies responsible for leading the physical design implementation process, including place and route, for entire chip designs. The job description for this
A Full Chip Reliability Lead is a senior-level position in semiconductor companies responsible for overseeing and ensuring the reliability of entire chip designs. The job description for this role typically includes the following responsibilities and qualifications:
A Full Chip STA Lead is a key role in semiconductor companies, responsible for leading Static Timing Analysis (STA) activities for complex full-chip designs. The job description for this role typically includes the following responsibilities and
A IP/SS Pre-Sil Verification Lead is a crucial role in semiconductor companies focusing on the verification of Intellectual Property (IP) blocks and Sub-Systems (SS) before silicon fabrication. The job description for this role typically includes the
A Micro Architect is a key role in semiconductor companies and computer architecture firms, responsible for designing the microarchitecture of computer processors and systems-on-chip (SoCs). The job description for this role typically includes the following responsibilities
A Physical Design Engineer with 15+ years of experience is a senior-level position in semiconductor companies, responsible for leading and executing physical design activities for complex integrated circuits (ICs) and System-on-Chip (SoC) designs. The job description
A Physical Design Engineer with 4-8 years of experience plays a crucial role in semiconductor companies, focusing on the implementation of integrated circuit (IC) designs into physical layouts suitable for fabrication. The job description for this
A Physical Design Manager is a key position in semiconductor companies responsible for leading and managing the physical design activities of integrated circuit (IC) products. The job description for this role typically includes the following responsibilities and
A RTL Design Engineer with 15+ years of experience is a highly experienced professional in the field of digital design within the semiconductor industry. The job description for this role typically includes the following responsibilities and
A RTL Design Engineer with 2-3 years of experience is typically an entry-level to early-career position in semiconductor companies, focusing on the design and implementation of Register Transfer Level (RTL) logic for integrated circuits. The job
A RTL Design Engineer with 9-15 years of experience is a senior-level position in semiconductor companies responsible for designing and implementing Register Transfer Level (RTL) logic for complex digital integrated circuits. The job description for this
A SoC Pre-Sil Verification Engineer with 15+ years of experience is a senior-level position in semiconductor companies, responsible for leading and executing pre-silicon verification activities for complex System-on-Chip (SoC) designs. The job description for this role
