シールドエアーは、世界中に輸送される重要な商品を保護し、食品を保存し、eコマースとデジタル接続を可能にし、タッチレスで、安全で、無駄のない、よりリジリエンスのあるグローバルサプライチェーンの構築を支援するパッケージングソリューションを設計し提供します。 シールドエアーの社員は起業家的なイノベーターであり、問題解決者であり、顧客、ステークホルダー、そして社会のニーズに対して独自の洞察とソリューションを提供することに尽力します。当社では、発明家、問題解決者、未来創造者のコミュニティを作り、我々の目的を達成するために情熱を持って取り組んでいます。 シールドエアーは2022年に60億ドルの売上を上げ、約17,700人の従業員が129カ国の顧客にサービスを提供しています。詳細については、www.sealedair.com。 仕事内容 日本におけるEquipmentチームの立ち上げ及びビジネスのリードする。日本市場の顧客、サプライ ヤー、ビジネスパートナーのニーズを理解し、シールドエアー社の機械・装置ビジネスの発展を促進す る。レポート先はANZ（オーストラリア、ニュージーランド）のEquipment and Automationダイレク ター。ANZ Equipmentチームへの日本市場のインプットや協力も仕事の一部となる。 取り扱う機械設備は、食品包装・保護包装・デジタル一体型設備に及ぶ。 部下はマネージャー数名を予定 背景：ビジネス拡大に伴う組織改編（機械セールスチームの立ち上げ）による増員 魅力：世界ナンバーワンの包装資材＆機械メーカー（NY証券取引所上場企業）で日本においてもトップ シェアを誇る。日本法人が設立されて今年で42周年。外資系と日本企業の良さを併せ持ち、新しいこと にチャレンジできる社風 求める経験 能力・スキル 大卒以上（機械工学・電子機械工学・化 学） 製造もしくは包装業界での経験 Equipment(機械設備)機械を扱った経験（包装機械設備や自動機械設備は尚可） 部下マネジメント経験(5年以上） ビジネスレベルの日本語及び英語を使用しての業務経験 新規ビジネスをリードしていける強いビジネス感覚 大きなマトリックスグローバル組織で働ける方 短期の出張が可能な方 求人ID： 42209 転勤： いいえ 当社は、人種、肌の色、宗教、性別、性的指向、性同一性または性表現、出身国、年齢、保護を必要とする障害、退役軍人のステイタス、または適用される連邦、州、または現地の法律に従ったその他の保護を必要とするステイタスに関係なく、すべての求職者とすべての従業員に平等な雇用機会を提供することを約束します。 *SEEの名前またはロゴを使用した詐欺的な募集にはご注意ください。SEEは、応募プロセスにおいて、パスポートやマイナンバーなどの個人情報を要求することはありません。応募の過程でSEEから受け取った情報に関して懸念がある場合は、globalta@sealedair.com まで直接ご連絡ください。...
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Position Summary : Lead Engineering and C&Q (Commissioning and Qualification) Team at Fuji Site in alignment with/and implementing global guidelines , in following areas: - Engineering and Project Management, - Commissioning and Qualification plan and execution,
職務 概要 Position Summary : Responsible for providing execution system and its design, qualification, maintenance and administration at our Fuji Plant. 法規制の順守に関する責任 Regulatory Compliance Responsibilities: Ø GMP/GCTP, Japanese law and regulation. Ø IAPP 主な職務及び主な責任 Major Job
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Who We Are At Kyndryl, we design, build, manage and modernize the mission-critical technology systems that the world depends on every day. So why work at Kyndryl? We are always moving forward – always pushing ourselves
A Full Chip LVS Lead is a key role in semiconductor companies responsible for leading Layout vs. Schematic (LVS) verification activities for entire chip designs. The job description for this role typically includes the following responsibilities
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